A common application of flash memory devices is as a mass data storage subsystem for electronic devices. Such subsystems may be implemented as either removable memory cards that may be inserted into multiple host systems or as non-removable embedded storage within the host system. In both implementations, the subsystem may include one or more flash devices and a flash memory controller.
Flash memory devices are composed of one or more arrays of transistor cells, with each cell capable of non-volatile storage of one or more bits of data. Accordingly, flash memory does not require power to retain data programmed therein. These arrays of cells are partitioned into groups to provide efficient implementation of read, program and erase functions. A typical flash memory architecture for mass storage arranges groups of cells into blocks, wherein a block contains the smallest number of cells that are erasable at one time. Because a block may contain multiple cells, each block may store multiple data units.
The overall storage capacity of flash memory devices may be diminished by bad blocks. A bad block is a block on a computer storage that cannot be used because of damage to the block. Causes of bad blocks include failed flash memory transistors, physical damage to the flash memory surface, and sectors being stuck in a digital state that cannot be reversed. When a bad block is detected, the block is marked as bad and the operating system discontinues use of the bad blocks for future file operations, such as reading and writing files. When the firmware of a flash memory controller finds a block to be bad, the flash memory controller marks the block as bad, and remaps the logical block to a different physical block. The result of marking a block as bad is that the block is no longer used by the flash memory system or by the operating system.
Flash memory systems contain an interface for sending data between a flash memory array and the flash memory controller. This interface is often low-speed, because access speeds for the underlying data stored on a flash memory array are slow. As the interface speed increases to conform with increasing data access speeds, these high-speed interfaces may introduce transient or intermittent errors caused by the transmission channel, which are not errors in the underlying data. These transient or intermittent errors can cause flash memory controllers to mark good blocks as bad prematurely in response to transmission errors.